This invention relates to detector circuitry, and in particular, to low power high sensitivity MOS detector circuits.
A semiconductor input buffer used in a commercially available 16K n-channel Random Access Memory (RAM) comprises two pairs of cross coupled MOS transistors and equalization circuitry with the channel widths of one pair of transistors being different from the channel widths of the other pair. It also uses a reference potential. Reducing the channel widths of one of the two pairs of the transistors does reduce the gain and will provide the desired imbalance; however, there is only a slight increase in threshold voltage and accordingly processing variations can significantly cut into yields. In addition, the reference voltage is another parameter which must be closely controlled.
It would be desirable to have an input buffer of the type discussed above in which no externally supplied reference voltage is necessary and which is more immune to semiconductor processing variations.